┄┄┄詳細(xì)介紹┄┄┄

General Description

The VA2213 is a cost-effective filter-less Class D stereo audio power amplifier that operates in wide range of various power supplies. VA2213 provide volume control with four selectable gain settings (20dB, 26dB, 32dB, 36dB). VA2213 can output 15W per channel into 8? load with lower supply current and fewer external components for driving bridged-tied stereo speaker directly. With the function of power limit, the speakers could be operated safely and the input signal would be also normalized.
 
VA2213 operates with high efficiency energy con- version up to 88% (8? Load) so that the external heat sink can be eliminated while playing music.
 
VA2213 also integrates Anti-Pop, Output Short & Over-Heat Protection Circuitry to ensure device re- liability. This device also provides the DC detect and protection scheme to prevent the damage of speaker voice coils.
 
The VA2213 is available in small TSSOP-28 green package with exposed pad.

Features

- Operation Voltage from 8V to 26V
- Maximum 88% Efficiency with an 8? Speaker
- 16.5W@8? Load with THD+N =1% at 18V
- 12.2W@4? Load with THD+N =1% at 12V
- 14.9W@4? Load with THD+N =10% at 12V
- 9.3W@8? Load with THD+N =10% at 12V
- Mute Control For Less CODEC Pop-up Noise
- Four Selectable Gain Settings
- Scalable Power Limit Function
- Speaker DC Detection and Protection
- Parallel BTL Speaker Driving Connection
- Thermal Protection with Auto-Recovery
- Speaker Protection Circuitry
- Short Circuit and Thermal Protection
- RoHS 2.0 compliant TSSOP-28 Green Pack- age with Exposed Pad

Applications

- LCD TV
- Multimedia Speakers
- Sound Bar

Typical Application

Pin Assignments And Descriptions

Pin No.	Pin	I/O/P	Function Description
1	SD_B	I	Shutdown control terminal. Low active. TTL Logic levels with compli- ance to AVDD.
2	FAULT_B	O	Protection Flag Indicator (Open Drain). Connecting FAULT_B and SD_B can be set to auto-recovery. Otherwise need to reset by cycling AVDD.
3	LINP	I	Left channel positive audio signal input.
4	LINN	I	Left channel negative audio signal input.
5	GAIN0	I	Gain selection least significant bit.
6	GAIN1	I	Gain selection most significant bit.
7	AVDD	P	Analog Power Supply.
8	AGND	P	Analog Ground.
9	VREG	O	Regulated Voltage. Nominal voltage is 5.5V.
10	PLIMIT	I	Power Limit Level Adjust. Connect a resistor divider from VREG to GND to set power limit. Connect to VREG directly for no power limit.
11	RINN	I	Right channel negative audio signal input.
12	RINP	I	Right channel positive audio signal input.
13	MUTE	I	Mute signal for fast disable/enable of outputs (HIGH = outputs Hi-Z, LOW = outputs enabled). TTL logic levels with compliance to AVDD.
14	PBTL	I	Parallel BTL mode switch.
15,16	PVDDR	P	Right channel power supply.
17	BSPR	I	Bootstrap I/O for right channel positive high-side switch.
18	ROUTP	O	Right channel positive output.
19	PVSSR	P	Right channel power ground.
20	ROUTN	O	Right channel negative output.
21	BSNR	I	Bootstrap I/O for right channel negative high-side switch.
22	BSNL	I	Bootstrap I/O for left channel negative high-side switch.
23	LOUTN	O	Left channel negative output.
24	PVSSL	P	Left channel power ground.
25	LOUTP	O	Left channel positive output.
26	BSPL	O	Bootstrap I/O for left channel positive high-side switch.
27,28	PVDDL	P	Left channel power supply.

Absolutely Maximum Ratings
Over operating free-air temperature range, unless otherwise specified (* 1)
 

Symbol	Parameter	Limit	Unit
VDD(PVDDR, PVDDL, AVDD)	Supply voltage	-0.3 to 30	V
VI (GAIN0, GAIN1, PBTL, FALUT_B, MUTE, SD_B)	Input voltage	-0.3 to VDD+0.3	V
VI (PLIMIT)	Input voltage	-0.3 to VREG+0.3	V
VI (LINN, RINN, LINP, RINP)	Input voltage	-0.3 to 6.5	V
TA	Operating free-air temperature range	-40 ~ +85	oC
TJ	Operating junction temperature range(* 2)	-40 to +150	oC
TSTG	Storage temperature range	-65 to 150	oC
R(LOAD)	Minimum load resistance	8 (VDD>15V) 4 (VDD≤15V)	?
θJC	Thermal Resistance (Junction to Case)	8	oC/W
θJA	Thermal Resistance (Junction to Air)	45	oC/W
Electrostatic discharge	Human body model	±2	kV
Electrostatic discharge	Machine model	±200	V

( *1): Stress beyond those listed at “absolute maximum rating” table may cause permanent damage to the device. These are stress rating ONLY. For functional operation are strongly recommend follow up “recommended operation conditions” table.
 
 
 
 

Recommended Operating Conditions

Over operating free-air temperature range, unless otherwise specified.
 

Symbol	Parameter	Test Condition	Specification		Unit
			Min	Max
VDD	Supply voltage	PVDDL, PVDDR, AVDD	8	26	V
VIH	High level input voltage (GAIN0, GAIN1, PBTL, MUTE, SD_B)	VDD=24V	2		V
VIL	Low level input voltage (GAIN0, GAIN1, PBTL, MUTE, SD_B)	VDD=24V		0.8	V
VOL	Low level output voltage (FAULT_B)	VDD=24V, RPULL-HIGH=100k?		0.8	V
TA	Operating free-air temperature		-40	85	oC

Electrical Characteristics

TA = 25℃, VDD = 12V, RL=8?, GAIN=20dB, unless otherwise noted.

Symbol	Parameter	Test Condition		Specification			Unit
				Min	Typ.	Max
|VOS|	Output offset voltage (measured differentially)	VI=0V			1.5	15	mV
IQ	Quiescent current	SD_B=2V, No load, w/o L/C			25	40	mA
ISD	Shutdown current	SD_B=0.4V, No load			300	450	µA
tON	Shutdown turn-on time	SD_B=2V			20		ms
tOFF	Shutdown turn-off time	SD_B=0.8V			2		µs
fOSC	Internal oscillation frequency				260		kHz
A	Amplifier gain	GAIN1=0.8V, GAIN0=0.8V			20		dB
		GAIN1=0.8V, GAIN0=2V			26
		GAIN1=2V, GAIN0=0.8V			32
		GAIN1=2V, GAIN0=2V			36
RDS(ON)	Drain-Source ON resistance1	VDD=12V, IOUT=500mA	High Side		240		m?
			Low Side		240
VREG	Regulator output	IVREG = 100µA, VDD=8~25V		5.25	5.5	5.75	V
tDC-DET	DC detect time				450		ms

(1) Design center value.
 

Electrical Characteristics

TA = 25℃, VDD = 24V, RL=8?, GAIN=20dB, unless otherwise noted.

Symbol	Parameter	Test Condition		Specification			Unit
				Min	Typ.	Max
|VOS|	Output offset voltage (measured differentially)	VI=0V			1.5	15	mV
IQ	Quiescent current	SD_B=2V, No load, w/o L/C			35	50	mA
ISD	Shutdown current	SD_B=0.4V, No load			350	500	µA
tON	Shutdown turn-on time	SD_B=2V			20		ms
tOFF	Shutdown turn-off time	SD_B=0.8V			2		µs
fOSC	Internal oscillation frequency				260		kHz
A	Amplifier gain	GAIN1=0.8V, GAIN0=0.8V			20		dB
		GAIN1=0.8V, GAIN0=2V			26
		GAIN1=2V, GAIN0=0.8V			32
		GAIN1=2V, GAIN0=2V			36
RDS(ON)	Drain-Source ON resistance1	VDD=12V, IOUT=500mA	High Side		240		m?
			Low Side		240
VREG	Regulator output	IVREG = 100µA, VDD=8~25V		5.25	5.5	5.75	V
tDC-DET	DC detect time				450		ms

(1) Design center value.